Berkeley CSUA MOTD:Entry 52952
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2025/07/16 [General] UID:1000 Activity:popular
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2009/5/6 [Computer/HW/CPU] UID:52952 Activity:moderate
5/5     Any idea why the AMD only added 8 more registers with the AMD64 arch.?
        Why 16 registers and not, say, 32?
        \_ To double the accessible register count, you need one more bit
           in the instruction stream _per_ register field.  x86 instruction
           set is already packed like rat's nest as is.
2025/07/16 [General] UID:1000 Activity:popular
7/16    

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