Berkeley CSUA MOTD:Entry 49874
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2021/10/17 [General] UID:1000 Activity:popular
10/17   

2008/5/2-8 [Computer/SW/Compilers] UID:49874 Activity:low
5/2     How do I get the L1/L2 cache size and cache line size on my machine?
        Can I find this stuff out at compile time somehow?
        \_ You aren't planning on running your code on any other processors?
        \_ May I ask what it is you want to achieve ultimately? If you don't
           know your architecture and want to find out dynamically, there are
           tools that can peek/poke to give you definitive answers, plus you get
           to see the latency of L1/L2/memory and infer a lot of info like
           cache associativity. Prof Saavedra has done a lot of cache benchmarks
           and micro measurements.                              -kchang
           tools that can peek/poke to give you definitive answers, plus you
           get to see the latency of L1/L2/memory and infer a lot of info like
           cache associativity. Prof Saavedra has done a lot of cache
           benchmarks and micro measurements.                           -kchang
           http://citeseer.ist.psu.edu/saavedra95measuring.html
        \_ No, there isn't a simple way, compile time or not. Your common
           user oriented desktop compiler today doesn't know anything
           about L1/L2 besides knowing how to do proper register allocation
           and in most cases don't even do a good job of spilling, knowing
           about cache effects, etc. Now, there is a lot of research in
           the past 20 years where compilers for specialized applications
           will optimize vector computing, tight loops, unrolling based
           on known monotonicity of variables, specialization, and allocate
           memory access patterns all based on memory locality (L1/L2),
           but you're not going to get that type of optimization from
           gcc or M$ compiler.
           the past 20 years where compilers will optimize vector computing
           and allocate memory access patterns based on L1/L2, but you're
           not going to get that from gcc or M$ compiler.
           \_ That's unfortunate.  Is there some program I can run to find
              out?  /proc/cpuinfo tells me, "cache size : 4096 KB", but doesn't
              give L1, or line size.  Is that just the data cache?
              (This is an Intel Core2 )
        \_ What the hell does "at compile time" mean?
           \_ I mean, perhaps there is some built in constant I can use
              that gives the L2 cache size of the machine you're compiling on.
              \_ You mean for a POSIX C++ compiler?  Also do you not expect
                 your code to be run on any other machine?
                 \_ Nope, this is purely an optimization test for 1 machine.
                    I guess if there's a way to find out the sizes dynamically
                    that's ok too.
                    \_ What I'm saying is that "compile time" doesn't mean
                       shit.  Compile time + what language/compiler you are
                       using might mean something.
                       \_ Language: C, C++, or Fortran.  Not picky
                          Compiler: gnu, intel, or portland.  Not picky.
                          OS: Linux.
                    \_ If it's just for one machine, why don't you just look
                       up the specs at Intel or AMD's website?
                       \_ I think I'd have to know more about the CPU than I
                          do.  Also, it would be nice to be able to recompile
                          it on other machines for comparison.
                          \_ Then you probably want to look into a CPUID
                             utilities (or roll your own simple version if
                             you just want simple cache info), along with
                             preprocessing of some sort. However, cache size
                             and line size are spelled out pretty clearly in
                             specs, so you don't have to know all that much.
                          \_ Someone considerately overwrote my post here,
                             so to recap, look into a cpuid utility +
                             preprocessing.
2021/10/17 [General] UID:1000 Activity:popular
10/17   

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citeseer.ist.psu.edu/saavedra95measuring.html
If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies. That work is extended here by: developing a high level program to measure the design and performance of the cache and TLB for any machine; using those measurements, along with published miss ratio data, to improve the accuracy of our run time predictions; Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes. IEEE Transactions on Computers, pages 1223--1235, October 1995.