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formally unwrapped its "hardware virtualizati on" technology, which allows software written for one processor to run o n another platform. The technology will be adopted and deployed by an undisclosed computer OE M in the fourth quarter, company executives said, and five more manufact urers are expected to announce support for the technology next year. The techniques that Transitive have developed, however, could allow an application written for the AIX operating system on IBM's Powe r architecture to run alongside an application written for Sun's Solaris OS on an UltraSPARC processorall on top of an Itanium chip produced by Intel Corp. "All of them are orphaned on very old hardware," he said. The QuickTransit technology uses a core kernel, with a modular back end t hat plugs into the target hardware. Likewise, a series of modular front ends provide a limited number of architectures that the technology can v irtualize, with more on the way. The QuickTransit technology can virtualize any mainframe operating system on all four processor architecture back ends, according to the company. In addition, the Itanium, Opteron and x86 back ends will virtualize the MIPS architecture. Both the Opteron and x86 products will also allow a virtualized Power or PowerPC architecture to run on top of them; likewis e, a PowerPC chip can also run an x86-designed operating system, such as Windows, on top of it.
Click here to read about AMD's "Pacifica" virtualization tech nology. However, the technology will most likely not be sold to individual users, so a company such as Hewle tt-Packard Co. would have to decide to license the technology and includ e it with their PCs. On average, translating the various instructions will produce about 80 pe rcent of the computational performance of a native compilation, said Fra nk Weidel, lead solutions engineer at Transitive. The QuickTransit kerne l also requires a memory penalty of about 25 percent per application, We idel said. The amount of memory an application uses for data is not affe cted. However, the multiple instances of the technology will run side by side; for example, the company has been unable to break the QuickTransi t application running 200 instances of the technology alongside one anot her, he said. QuickTransit has been tested on 64-bit applications, as well as for compa tibility between 32-bit applications written on a 64-bit architecture, W eidel said. The technology maintains compatibility by translating blocks of instructi ons into an intermediate representation, then optimizing the code. If th e software discovers loops of frequently used code, that code is stored in the cache. According to Weidel, the technology can handle operating-s ystem and graphics calls to specific registers through a "call mapper" t hat intercepts and passes on the request to the target hardware to maint ain compatibility. According to Weidel, the technology can handle calls and functions writte n to specific technologies not included in the target hardware, such as SS2 instructions specifically encoded in the latest Intel Pentiums that are not included in the PowerPC.
My Yahoo page Editor's Note: This story has been corrected on Sept. A previous version of this story mischaracterized the performance of the virtualized microprocessor and application.
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