5/10 On a 32 bit architecture, if I declare something boolean or byte,
does it still use 32 bits, or is it possible to have a different
offset for the alignment to pack it more efficiently? ok thx.
\_ For boolean, it's all up to your compiler. For byte, most likely
it's 8 bits, but it's still up to your compiler.
\_ I heard that if the alignment isn't 32, either the arch
would raise an off-alignment exception, or that there is
a tremendous run-time penalty for the memory access. Is
this true, and which architectures would this apply to?
\_ memory alignment has nothing to do with this, since
you're presumably not trying to load a 32 bit word
from an arbitrary offset. if bool is implemented as
a char, then typically it's 8 bits and alignment
doesn't matter. x86 allows loading words from arbitrary
offsets, but there can be a significant performance hit,
whereas many mips style chips just do not allow it.
\_ To clarify this: the 32-bit alignment the previous poster
was worried about is only for 32-bit data values. If you
have an 8-bit piece of data, it only needs 8-bit alignment.
\_ The OpenBSD guys were saying that Sparc64 was their
preferred dev/testing arch b/c it has strict memory
alignment requirements; i386 less so.
\_ On i386 or above, if you use 32-bits and it's not 32-bit
aligned, there is a performance penalty but no exception.
If you use 8 bits, I think for some instructions there is a
performance penalty just from using 8 bits instead of 32 bits
(excpet on the SX-variant processors.) However, I think there
is no additional performance penalty if the 8-bit datum is not
32-bit aligned.
\_ Do you mean 'bool' and 'char' in C++? Or some other language? |