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| 11/23 |
| 2002/2/26 [Computer/HW/Drives, Computer/HW/Languages] UID:23977 Activity:high |
2/25 What happened to the "vis" program? The one that shows the output
of a program repeatedly?
\_ http://vlsi.colorado.edu/~vis/whatis.html
\_That's not the program I am talking about.
\_ That's not the program I am talking about. I want vis:
"a program that repeatedly executes a specified command
and refreshes the display of its output screen" from O'Reilly
\_ From what O'Reilley? They publish hundreds of titles.
\_ O'Reilly Unix Power Tools. 1st ed. This Program:
http://www.chemie.fu-berlin.de/cgi-bin/man?Vis
\_ Most of the power tools were on the included
CD, not necessarily part of any OS
\_ There's a similar program called "display"
http://www.ipsmart.com/src or misc/display in FreeBSD ports.
Be careful if you have ImageMagick installed; it also has a binary
in /usr/local/bin named "display" (which no one ever really uses,
so, well, don't worry about it)
--dbushong |
| vlsi.colorado.edu/~vis/whatis.html VIS (Verification Interacting with Synthesis) is a system for formal verification, synthesis, and simulation of finite state systems. It has been developed jointly at the University of California at Berkeley, the University of Colorado at Boulder, and more recently at the University of Texas, Austin. Verification is the process of checking if "what was designed is what was originally specified". While the traditional and most common method of verification is through simulation, recently, interest has increased in methods of formal verification, such as language containment and temporal logic model checking. VIS is able to synthesize finite state systems and/or verify properties of such systems, which have been specified hierarchically as a collection of interacting finite state machines. VIS provides the following features: * Simulation of logic circuits (proof of concept only). Each of these can be executed interactively from any point in the design hierarchy. A Verilog HDL front end, vl2mv, is also provided, which compiles a subset of Verilog into an intermediate format BLIF-MV. VIS improves upon first generation tools by: * providing a better programming environment, * providing new capabilities, and * improving performance in many cases. |
| www.chemie.fu-berlin.de/cgi-bin/man?Vis Vis () VIS UNIX System V (24 October 1988) VIS NAME Vis - repeatedly run command, refreshing screen SYNTAX Vis -d delay -f -h -s command args DESCRIPTION Vis repeatedly executes a specified command and refreshes the display of its output on the screen. This has the effect of making any normally non-screen oriented command into a screen oriented one. Similarly, commands may be piped together by enclosing them in quotes and separating them by |''. The single or double quotes around such a compound command are necessary to escape processing from the shell. The first line on the output screen is reserved for Vis status and will contain the command on the left side with the current execution count on the right side. The output of the command normally begins on the third line and continues to the end of the screen. When this occurs, Vis will automatically place the output of following passes starting on line two in order to maximize the amount of displayed information. The following switches may be specified if desired: -d delay specifies a non-default delay of delay seconds. Normally Vis will delay for 15 seconds between command re-executions. If a non-default delay is specified, the Vis status line will also include the delay interval centered within it (unless that would cause it to overwrite a long command, in which case it will be centered between the end of the command and the execution count). EXAMPLES Vis ps Continually display the status of processes on the system (up to 23 lines). Vis -s ls -l Continually display a long directory listing, highlighting via standout mode the parts that change each time. |
| www.ipsmart.com/src -> www.ipsmart.com/src/ Port 80 References 1. |