6/29 A typical 32 bit RISC architecture has 32 bits/instruction. That
means each instruction is 32 bits, w/6 bits op code and the rest
is operands, const, etc. RISC binaries are usually bigger than
that of variable instruction set CISC (e.g. x86, Java byte code).
So does that mean a 64 bit machine with binaries compiled for its
native instruction set have a much bigger size than that of the
original 32 bit counterpart because the operands and const are now
much bigger?
\_ no. that just means that your register sizes can be up to
64-bits wide without artificial concatination like in the
MIPS I/II ISA. MIPS III/IV which are both 64-bit architectures
still use 32 bit instructions but their registers are larger
and are capable of using 40/44-bit addressing. CISC instructions
on average, are not considerably smaller than RISC because of
their variable lengths. Keep in mind that many CISC instructions
actually exceed 32-bits.
\_ so what happens when I have two operands that are 32
bits, and would overflow on a 32 bit machine but not on a
64 bit machine? Also, do 32 bit operands get sign
extend? Also, wouldn't you need a 64 bit instruction
to do the following more efficiently:
(word1<<32|word2)+(word3<<32|word4)?
\_ What does this have to do with swelling biological tissue?
\_ There are special intructions to load values into
the upper portion of the 64-bit registers. I don't
know what they are off the top of my head but
download the MIPS IV ISA manual and you can find
out. In terms of doing things efficiently, it is.
You have to look at things from a statistical
point of view. Each 64-bit value comprise of 4
16-bits so theoretically you would need 4 instructions
to form a single value. But for the common case,
most of those 16-bits are just zeros so it's not
as bad as you think. And if you think about it,
it's much more efficient to do something with 4
instructions than to do it with 2 instructions
that are double the size because in the latter case
you force all instructions to double in size which
isn't necessary.
\_ just to add to that, many program store constants
in a certain part of the binary so it's a matter
of issuing a lw.d instruction.
\_ You use registers instead of immediates, dumbass.
\_ ali, is that you?
\_ no. obviously, you don't understand my style.
i only talk shit at people who think they know
something, give out wrong answers, and become
irate when you suggest to them that they should
add some uncertainty in their answers when they
clearly don't know what they're talking about.
i think the above is exemplary of what a good
motd exchange should look like. -ali
\_Because without ali here to keep things straight,
the motd would be full of anonymous trolls and
wrong answers and oh my! We all owe a big
debt to ali for keeping the motd the pure source
of factual information that it is! Three
cheers for ali!!!
\_ the arrogant punk speaketh again!
- anti-ali association (AAA)
\_ Why do you have a problem with arrogance?
So the man is smarter than you and knows
it. I mean it's not like it takes much
to be smarter than you.
\_ Arrogance is a bad thing. Being smarter
is not. Being smarter is not the same
thing as arrogance. Try a dictionary.
--smarter than you
\_ Well said.
\_ Why is arrogance a bad thing? A
smarter person is better than a less
smart person and should treat the less
smart person accordingly.
\_ Arrogance is a Bad Thing because if
we all lived the way you'd have it,
life would suck for everyone. You
especially, I figure.
--smarter than you
\_ Why would it suck? I am prepared
to defer to my intellectual
superiors. This lame appeal
to Kantian ethics will get you
nowhere.
\_ Because Dalai Lama said so!
\_ moron. - the flaming goat
\_ Actually, in sparc, for example, the cpu did 32-bit loads
from memory. So you wanted both the instruction and the
data to be contained in one 32-bit word. If I'm remembering
my horrible sparc-asm encounter correctly.
\_ that dash shouldn't be there
Or maybe that was the 64-bitcpu mess
\_ much more common than loading a 64 bit constant is loading
an immediate address with a small number of bits (like, say 10),
and have that address point to a long constant. on an alpha,
you see a lot of:
lda $1,some_const
ldq $17,0($1)
where some_const is literal label which takes only a few bits
to embed in an instruction. -ali |
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