8/31 Anyone know how vector processors work? You'd think it would be
hard to exploit parallelism where you would issue one instruction
on several pieces of data. Isn't that wastefull of ALUs and cpu
space on general purpose instructions that don't require single
instructions on multiple data (sorry, haven't taken 152/252 yet).
\_ Vector processors are very efficient, since they allow you to do
loops in single instructions and suchlike, and are reasonably
easy to compile too, as well. Either talk to me if you want to
learn more, or look in the appendix of Hennesey & Patterson.
-nweaver
\_ for the loop for(i=0;i<32;i++) { A[i]++; } that would work
at the end of a vector operation!!) and low-overhead conditional
fine. But entire programs aren't like that and, thus,
cannot exploit vector parallism. Hence, on a normal
instruction you would use only 1 ALU and the other 31 won't
be used at all (is that how it works?). Why not just use
superscalar design instead since it works on all
of your sin of stupidity.
instructions?
\_ A lot larger sections of the program, especially those
inner loops in multimedia applications, can be vectorized.
And in general, you want a vector coprocessor on a
normal microprocessor. And a vector processor is small,
\_ obviously you are a moron. if by "every processor" you mean
"every processor in the intel x86 family," then you are obsolved
of your sin of stupidity. many number crunching processors (like
DSPs) have zero overhead loops or conditional instructions.
These just end up being not very useful ops on a general purpose
architecture that runs shit like windows and ms word.
\_ Vectorised SpellCheck!!!!!!!
\_ MasPar SpellCheck!
\_ Just curious, what do you use for a word processor, if not
MS Word or one of the similar apps from another company also
running on Windows?
\_ i use MS word and Emacs.
\_ I don't use word processors - plain text & html are all
the formatting I need, and vi/emacs do much better than
MS Word at editing either.
especially fixed point. A 32 bit, 8 lane (8 separate
pipelines), 2 functional units and one load/store unit
can fit in roughly the space taken up by a 16kB cache!
Vector processors are very economical to build because
they require almost no controll logic. -nweaver
\_ if you want to run word on a vector, well... get a clue?
\_ Isn't MMX intel's vector instruction set meant to
operate in desktop computers running word processors.
Okay, consider using vector inst to do scientific
computing. Exploiting parallelism would still be hard
because of the complexity of software. Many scientific
programs have multilevel loops and recursive procedure
calls and such nonlinear loops. There are also very
complicated data structures like gmp which primitive
cpu instructions could not handle (in case you were
trying to break and RSA key). What use are vector
ISA's if you can't exploit them on a general purpose
machine?
\_ You saying Dave Patterson is a twink?
\_ Dave Patterson is a twink.
\_ they allow low-to-zero cost synchronization (implicit synch.
at the end of a vector loop!!) and low-overhead conditional
execution (with condition masks); every processor should have
both of these, but none do. -nick |